TOKYO ELECTRON LIMITED

A must-see for process engineers! ≪Students: attend for free≫ SPIE Advanced Lithography + Patterning 2022

Event Summary

Date

2022.04.24 - 2022.04.28

Location

United States(San Jose)

Target

Process Engineer

SPIE Advanced Lithography and Patterning, one of the leading international conferences that holds the key to technological innovation through semiconductor miniaturization, will be held from April 24 to 28! Tokyo Electron (TEL) will be presenting 14 papers, including co-authored projects.
Since Gordon Moore, one of the founders of Intel, proposed "Moore's Law," semiconductor devices have been miniaturized to improve performance and reduce costs. The first microprocessor that appeared in 1971 was in the 10-micron technology node and packed some 2,300 transistors on a chip. Today, the most advanced semiconductor devices are approaching the 10 nm node with over 1 billion transistors per chip. The width of the Fin (which serves as the source/drain of a transistor) is less than 10 nm, or the size of just a few dozen silicon atoms. The tolerable process variance is therefore thickness of a few atoms. It means that the semiconductor manufacturing technology has finally entered a stage where atomically precise control is required.
As announced in June 2021 in the press release titled "Tokyo Electron to Collaborate with imec-ASML Joint High NA EUV Research Laboratory", TEL will collaborate with imec-ASML to develop a new high NA EUV lithography technology that will enable the development of a new generation of semiconductor manufacturing equipment for multiple consecutive processes. By leveraging the strength of our product lineup, TEL is forming a partnership with resist materials suppliers to provide comprehensive patterning solutions covering etch processes as well as Coater/Developer for lithography processes through our global collaboration.
In addition to presentations on high-NA EUV lithography, the SPIE Advanced Lithography and Patterning will also feature a number of presentations on patterning and etch process, in screening new resist and underlayer materials, in improving metrology and in photomask technology.
Free to attend for students. We hope that this would be a great opportunity to learn alongside the experts, explore the semiconductor industry, and network with notable professionals!