Tokyo Electron Releases CLEAN TRACK™ LITHIUS Pro DICE™, a 300mm Wafer Coater/Developer

Tokyo Electron (TEL; Head Office: Minato-ku, Tokyo; President: Toshiki Kawai) has announced the release of CLEAN TRACK™ LITHIUS Pro DICE™, a 300mm Wafer Coater/Developer.

For over a decade, TEL has supported the mass production of advanced semiconductors by providing the market with its uniquely designed LITHIUS Pro™ Z coater/developer. Anticipating the emergence of semiconductors requiring ultra-fine patterning with EUV lithography, TEL has expanded its coater/developer line to include the new LITHIUS Pro DICE™. The system features innovative defect control technology that can reduce wafer defects and associated costs caused by flawed resist coating by 50% or more compared to previous models.^*1 In addition to having the fastest coating and development speeds in the industry, the system maximizes the cleanroom footprint usage, increasing productivity and environmental performance by 25% or more compared to previous models. ^*2 The system’s enhanced data collection and information processing capabilities ensure greater availability of the system and increased efficiency of engineers. Thanks to these advantages, the system can efficiently support the production of a wide range of advanced semiconductor devices, including logic, DRAM, and NAND.

LITHIUS Pro DICE™ offers world-class productivity and superior defect control technology, which makes it suitable for a wide range of applications, including high-NA EUV and DUV processes,” said TEL’s Yasuhiro Washio, Vice President & General Manager, CTSPS BU. ““To better serve our customers, we will continue advancing innovative technologies and broadening our portfolio of process modules, driving the ongoing evolution of semiconductor devices.”

With the release of LITHIUS Pro DICE™, TEL aims to continuously add value to semiconductor production processes and consolidate its position as an industry leader through continued innovation.

LITHIUS, LITHIUS Pro, LITHIUS Pro DICE is a registered trademark or trademark of Tokyo Electron Group in Japan and/or other countries.

An estimate by TEL based on a comparison of defect performance and chemical consumption with those of previous models

An estimate by TEL based on a comparison of throughput, footprint, and utility exhaust volume with those of previous models