SPIE Advanced Lithography + Patterning 2025
Event Summary
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Date
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2025.02.23 - 2025.02.27
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Location
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San Jose, CA
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Target
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Process Engineer
From February 23 to 27, SPIE Advanced Lithography + Patterning 2025 will be held in San Jose, California, USA. With the rise of new applications such as AI, autonomous driving, and AR/VR, the semiconductor market is expected to exceed $1 trillion by 2030. To enable this significant growth, technology innovation is moving forward, supported by two primary drivers: the one is device scaling which is well-known intrinsic nature of performance enhancement of semiconductor and the other is a new driver, heterogeneous integration. As part of the evolution of manufacturing technologies, Tokyo Electron (TEL) will be presenting 8 invited talks and 19 presentations together with co-authors at this conference.
TEL’s strength, which holds nearly 100% market share of Coater/Developer for EUV lithography space and processes 23,249 patents (as of March,2024）, the highest number in the semiconductor manufacturing equipment industry, is its world-leading technological innovation capability.
Join us and learn together at SPIE Advanced Lithography + Patterning 2025!
#Technology Enabling Life
