International Memory Workshop

The topic at this time is IMW (International Memory Workshop) held in Kyoto from May 13th to May 17th. This workshop is a place for engineers from all over the world to discuss process technologies, design technologies, applications, market needs, strategies on semiconductor memory devices.
There was concern that the number of participants would be reduced because the venue at this time is in Japan for the first time, but the participants in this year were 345 peoples, which increased about 100 peoples comparing to the last couple of years’ participants ,which were about 250 peoples. Some of participants did not have their sheet for the discussion.
As remarkable presentations, 96 layers of 3D NAND was one of them, and it turned out that 2 Tier structure was used as a stacking technology. The history and future prospects of Hf-based ferroelectric materials were presented, and expectations as a new material used in memory are increasing. The presentation related to ReRAM has shifted from the resistance material to the selector materials, the development of resistive material has fallen to a point, suggesting that we have moved on to the next stage. As for DRAM, there was a presentation to use the FinFET in the peripheral circuit, which indicates to aim at even higher performance. Although it is said that the limit of scaling is approaching in the memory devices, but there are still many things to be done in terms of the technologies.