Tokyo Electron Limited (TEL) announced today that it has successfully demonstrated dynamic testing*1 of a power device at the wafer level, which until now had been considered technically extremely difficult.
With the increased need for energy-saving technologies, there is a greater focus on research and development of new techniques and materials to achieve higher electrical efficiency of power devices. Cutting edge power device products include multiple individual power device dies mounted in a single module. Reducing the defect ratio in individual die has become increasingly critical and requires that testing similar to that which is performed after packaging and assembly be done at the wafer level.
Until now, only static testing*2 has been performed at the wafer level, while dynamic testing has occurred after assembly and packaging. TELs new technology, developed from its wafer probing expertise, has validated that both dynamic testing and static testing of power devices is possible at the wafer level. TELs integrated solution will enable decreased development time for next-generation power devices through wafer level access to test results. In addition, TELs solution aids in detecting product defects early in the manufacturing process, reducing final product packaging and test costs.
*1 Device switching / dynamic characteristic (AC) test
*2 Device static characteristic (DC) test